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MazeGen
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Joined: 05 Sep 2007
Posts: 98
Location: .cz
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 Posted: Sat Oct 18, 2008 9:46 pm Post subject: X86 Opcode and Instruction Reference, 1.00 - 1.11 |
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Let's discuss X86 Opcode and Instruction Reference project.
Massive update of this revision include addition of SSE, SSE2, SSE3 and SSSE3 instructions, and editions sorted by mnemonic:
coder32-abc
coder64-abc
coder-abc
geek32-abc
geek64-abc
geek-abc
The Store was improved, prices discounted.
| Quote: | | This reference is intended to be precise opcode and instruction set reference (including x86-64). Its principal aim is exact definition of instruction parameters and attributes. |
Last edited by MazeGen on Thu Jan 28, 2010 8:34 am; edited 2 times in total |
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MazeGen
Site Admin
Joined: 05 Sep 2007
Posts: 98
Location: .cz
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| Posted: Wed Dec 17, 2008 4:53 pm Post subject: New revision 1.01 |
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New revision 1.01 is out. Mostly a bugfix release. Complete list is here:
http://ref.x86asm.net/#rev_history |
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Mikae
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| Posted: Tue Jan 13, 2009 1:11 pm Post subject: EM64T |
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Hello, I'm trying to use your opcodes table (XML version) in my disassembler. I almost done a table generator, but I've found that coding of some instructions marked with F64 in Intel Manual is inconvenient.
For example, instruction 'call Ev' (marked as F64) is expressed in two entries:
| Code: | <pri_opcd>
<entry>
<opcd_ext>2</opcd_ext>
<syntax><mnem>CALL</mnem><dst><a>E</a><t>v</t></dst></syntax>
<grp1>gen</grp1><grp2>branch</grp2>
<grp2>stack</grp2>
<note>&call;</note>
</entry>
</pri_opcd>
<pri_opcd>
<entry>
<opcd_ext>2</opcd_ext>
<proc_start>10</proc_start>
<syntax><mnem>CALL</mnem><dst><a>E</a><t>q</t></dst></syntax>
<grp1>gen</grp1><grp2>branch</grp2>
<grp2>stack</grp2>
<note>&call;</note>
</entry>
</pri_opcd>
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From your manual 'v' means:
| Quote: | | Word or doubleword, depending on operand-size attribute (for example, INC (40), PUSH (50)). |
And 'q' is:
| Quote: | | Quadword, regardless of operand-size attribute (for example, CALL (FF /2)). |
From this information I can not determine real size of operand. From the point of view of disassemb | Code: | ler the code is very simple:
if (mode == DISASSEMBLE_MODE_64)
size = 8;
else
size = get_operand_size_16_32(prefixes); |
Are you going to deal with this? May be it is a good idea to add 'vfq' size qualifier? (Yes, I understand that the two entries differs with 'proc_start' attribute, but I've changed your XML a little, merging different entries for the same opcode, for easier parsing. Or, may be you have another version of XML?)
--
Thanking In Advance,
Mikae. |
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MazeGen
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Joined: 05 Sep 2007
Posts: 98
Location: .cz
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| Posted: Tue Jan 13, 2009 1:42 pm Post subject: |
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Hello Mikae,
it is great that you're trying use the XML in your disassembler.
The thing is that the XML is "biarchitectural". Most of the entries are usable for both x86-32 and x86-64. However, The FF/2 CALL opcode is described using two entries. The latter entry has mode='e' attribute value which means that it applies exclusively to 64-bit mode. The former entry applies to real mode and all protected modes.
Anyway, the whole thing is more complicated. I offer you a deal: if you send me your transformations which work with the XML reference (what you should do, according to the license), I will give you access to the Benefits, which contain helper XSL transformations, which can come in handy for you, and also contrain "Writing a Disassembler Using X86 Opcode and Instruction Reference" article which can help you understand the XML significantly.
My e-mail is mazegen@gmail.com.
Last thing is that you don't seem to use the latest version, which is 1.01. It is available for public download on the homepage. |
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Mikae
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| Posted: Tue Jan 13, 2009 2:12 pm Post subject: |
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Hello, MazeGen.
I've sent you my XMLs. |
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MazeGen
Site Admin
Joined: 05 Sep 2007
Posts: 98
Location: .cz
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| Posted: Thu Aug 20, 2009 7:42 am Post subject: 1.10 is out |
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New revision 1.10 is out.
All SSE4, VMX and SMX instructions added, along with those few new general and system instructions. This makes the reference up-to-date with current Intel processors. |
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MazeGen
Site Admin
Joined: 05 Sep 2007
Posts: 98
Location: .cz
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MazeGen
Site Admin
Joined: 05 Sep 2007
Posts: 98
Location: .cz
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| Posted: Wed Jul 28, 2010 9:27 am Post subject: spam |
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| Temporarily closed due to huge amount of spam. |
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